NEW ALGORITHM FOR BEHAVIOURAL TEST GENERATION

Authors

  • Balázs Benyó

Abstract

Significant efforts of the test design community have addressed the development of high level test generation algorithms in the last decade. The main problem originates in the insufficiently low gate level fault coverage of test sets generated at the behavioural or functional levels due to oversimplifications which result from the application of highly abstract and technology-independent fault models. In this paper a novel behavioural level test generation algorithm is presented effectively utilizing information on the circuit structure, which is extracted from the high level synthesis process. Experimental results show that the gate level fault coverage of the test sets generated by the new algorithm is similar to those assured by the gate level test generation algorithms.

Keywords:

automatic test generation, behavioural level digital circuit synthesis, path testing, VHDL

How to Cite

Benyó, B. “NEW ALGORITHM FOR BEHAVIOURAL TEST GENERATION”, Periodica Polytechnica Electrical Engineering, 42(3), pp. 311–335, 1998.

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Section

Articles