NEW STRUCTURE OF A FAST HIGH RESOLUTION ADC WITH GOOD LINEARITIES

Abstract

This paper proposes a new structure of a high speed analog-to-digital converter (ADC) with high resolution and good linearities. First a coarse survey of common architectures for high speed ADC-s with high resolutions including their drawbacks and limits is given. The principle of the proposed ADC is discussed and electronic circuits, used in this structure, are noted.